Edit Values
Core i7-920XM Extreme Edition
General Info
Designer	Intel
Manufacturer	Intel
Model Number	i7-920XM
Part Number	BY80607002529AF
S-Spec	SLBLW Q2YF (QS), Q3B8 (QS)
Market	Mobile
Introduction	August, 2009 (announced) Sep 23, 2009 (launched)
End-of-life	September 30, 2011 (last order) December, 2011 (last shipment)
Release Price	$1054.00
Shop	Amazon
General Specs
Family	Core i7EE
Series	Core i7-900
Locked	No
Frequency	1,999.99 MHz
Turbo Frequency	Yes
Turbo Frequency	3,199.99 MHz (1 core), 3,066.66 MHz (2 cores), 2,266.66 MHz (3 cores), 2,266.66 MHz (4 cores)
Bus type	DMI
Bus rate	2.5 GT/s
Clock multiplier	15
CPUID	106E5
Microarchitecture
Microarchitecture	Nehalem
Platform	Calpella
Chipset	Ibex Peak
Core Name	Clarksfield
Core Family	6
Core Model	30
Core Stepping	B1
Process	45 nm
Transistors	774,000,000
Technology	CMOS
Die	296 mm²
Word Size	64 bit
Cores	4
Threads	8
Max Memory	8 GiB
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
TDP	55 W
OP Temperature	0 °C – 100 °C

Core i7-920XM Extreme Edition is a 64-bit quad-core microprocessor introduced by Intel in late 2009 for the mobile market. The Core i7-920XM EE, which operated at 2 GHz with turbo frequency of up to 3.2 GHz for a single core was Intel's flagship mobile processor for the Nehalem microarchitecture. The chip is manufactured in 45 nm process. The i7-920XM supports 8GB of memory and has a thermal design power of 55 W.

Cache

Main article: Nehalem § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 256 KiB 262,144 B 0.25 MiB L1I$ 128 KiB 131,072 B 0.125 MiB 4x32 KiB 4-way set associative write-back L1D$ 128 KiB 131,072 B 0.125 MiB 4x32 KiB 8-way set associative write-back L2$ 1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB     4x256 KiB 8-way set associative write-back L3$ 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB     4x2 MiB 16-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR3-1333 Supports ECC No Max Mem 8 GiB Controllers 1 Channels 2 Max Bandwidth 19.87 GiB/s 20,346.88 MiB/s 21.335 GB/s 21,335.25 MB/s 0.0194 TiB/s 0.0213 TB/s Bandwidth Single 9.93 GiB/s Double 19.87 GiB/s Physical Address (PAE) 36 bit

Graphics

This MPU has no integrated graphics processing unit.

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
	PCIe Revision 2.0 Max Lanes 16 Configs 1x16, 2x8

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute HT Hyper-Threading TBT 1.0 Turbo Boost Technology 1.0 EIST Enhanced SpeedStep Technology TXT Trusted Execution Technology (SMX) VT-x VT-x (Virtualization) VT-d VT-d (I/O MMU virtualization) EPT Extended Page Tables (SLAT)

See also

• Core i7 Extreme Edition